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S.No. | Article Title & Authors (Volume 15, Issue 2, April - 2022) | Page Nos. | Status |
1. | Hybrid and Direct Logic Full Adder Based Comparator Using Microwind M. Bhavani, K. Vasanthi, K. Kavitha Rani & M. Sandhya Rani International Journal of Advances in Engineering & Technology (IJAET), Volume 15 Issue 2, pp. 9-16, April 2022. ABSTRACT One of the basic elements of ALU is Magnitude Comparator. Here in this paper, the design of Magnitude Comparator is described by using different styles of Full Adder design logic, where Full Adder is the basic building block of ALU which is used in Microprocessors and Digital Signal Processing. In VLSI systems, the main theme of present methodologies and techniques for design of any device is to reduce the power consumption and the area occupation. In this paper Comparator is developed by using various full adder logics with the help of DSCH2 and Microwind2. This will reduce the power consumption and area occupation. |
9-16 | Online |