International Journal of Advances in 
Engineering & Technology
Creative Commons License
This work is licensed under a Creative Commons Attribution 3.0 Unported License.

ISSN: 2231-1963

ijaet logo
Privacy Policy of IJAET
Go Green Online IJAET
Home Home
Aim & Scope Aim & Scope
Aim & Scope
Editorial Board Editorial Board
Editorial Board
Archives Archives
Call for Papers Call for Papers
Call for Papers
Instructions for Authors Instructions for Authors
Instructions for Authors
Online Submission Online Submission
Online Submission
Copyright Policy Copyright Policy
Copyright Policy
Indexing & Archiving Indexing & Archiving
Indexing & Archiving
Special Issue Special Issue
Special Issue
Open Access Open Access
Open Access
Peer Review Peer Review
Peer Review
Publication Guidelines Publication Guidelines
Publication Guidelines
Research Database Research Database
Research Database
Impact Factor Impact Factor
Impact Factor
Research Volunteer Research Volunteer
Research Volunteer
Disclaimer Disclaimer
Reviewer Board Reviewer Board
Reviewer Board
Flyers Flyers
IJAET Supporters IJAET Supporters
IJAET Supporters
Downloads Downloads
Help & Support Help & Support
Help & Support
Contact Us Contact Us
Contact Us
Web Gallery Web Gallery
Web Gallery


                Aim & Scope         Editorial Board    Call for Paper              Instruction for Authors

Copyright              Articles

                        Contact Us                    Open Access              Indexing & Archiving

Peer Review          Archives

        Help & Support    Downloads              Paper Submission
IJAET Background
Publication Fee Publication Fee
Publication Fee
Call for Papers
IJAET Sitemap
S.No. Article Title & Authors (Volume 14, Issue 2, April - 2021) Page Nos. Status
1. Design Criteria of CNTFET-Based A/D Circuits: A Review
Roberto Marani and Anna Gina Perri
International Journal of Advances in Engineering & Technology (IJAET), Volume 14 Issue 2, pp. 17-37, April 2021.
In this paper we review design criteria to evaluate the performance of typical analog and digital (A/D) circuits based on CNTFET, both in SPICE, using ABM library, and in Verilog-A, using a semi-empirical compact model for CNTFETs already proposed by us. The obtained results, with reference to a design of a phase shift oscillator, as example of analog circuit, are the same in static simulations and comparable in dynamic simulations. However using Verilog-A the simulation run time is much shorter and the software is much more concise and clear than schemes using ABM blocks in SPICE. Then we review a procedure in order to carry out static and dynamic analysis of basic digital circuits. In particular, to carry out the dynamic analysis, we consider both the quantum capacitance effects and the sub-threshold current. At last we analyze the timing performances of a NOT gate in order to define the optimal working conditions, emphasizing that the proposed method can be used to analyze the timing performance of any CNTFET-based logic gate.
17-37 Online